1. Field of the Invention
This invention relates generally to semiconductor device manufacturing, and, more particularly, to a method and apparatus for reducing deposition variation by modeling post-clean chamber performance.
2. Description of the Related Art
In the manufacture of semiconductor devices, wafers, such as silicon wafers, are subjected to a number of processing steps. The processing steps include depositing or forming layers, patterning the layers, and removing portions of the layers to define features on the wafer. One such used to form the layers is known as chemical vapor deposition (CVD), wherein reactive gases are introduced into a vessel, e.g. a CVD tool, containing the semiconductor wafers. The reactive gases facilitate a chemical reaction that causes a layer to form on the wafers.
As the CVD tool is used repeatedly, material builds up on the internal surfaces of the tool, eventually affecting the deposition rate and the defect density. One such application involves the formation of silicon dioxide using tetraethoxysilane (TEOS) in a plasma enhanced CVD (PECVD) tool. Silicon dioxide material builds up over time on the showerheads and other surfaces of the tool. Preventative maintenance procedures are performed periodically to remove this buildup and stabilize the deposition rate. Typically, a wet clean process (i.e., disassembly of the tool) is performed every 7-14 days, and in-situ cleanings (e.g., exposing the chamber to reactive plasmas, such as C3F8) are performed every two to three lots (e.g., each lot includes 25 wafers). After each cleaning evolution, the deposition rate for the tool is affected. During processing of the first 10 to 25 wafer after the tool is cleaned, the deposition rate of the tool is reduced. The degree and duration of this effect depends on a number of factors including the age of the showerheads, and the type of cleaning performed. FIG. 1A is a graph depicting deposition rates following a cleaning operation. The curve 4 reflects the deposition rate for a tool with new shower heads, and the curve 6 reflects the deposition rate for a tool with aging showerheads (i.e., typically replaced on 6-12 month intervals). For a newer shower head, the deposition rate is increased for the first wafers after the cleaning. As the shower heads age, the effect reverses, and the deposition rate for the first wafers after the cleaning is decreased. Also, the effect of the cleaning on the deposition rate has a longer duration on the tool with older showerheads.
A technique for addressing the post cleaning deposition rate fluctuation involves varying the temperature during the first wafers processed. This is achieved by setting parameters in the operating recipe of the tool. These parameters include a control temperature, a maximum ramp parameter, and a ramp rate. The first wafer is processed at the temperature defined by the control temperature minus the maximum ramp parameter. Decreasing the temperature during the formation of the layer increases the deposition rate. The temperature is incremented by the ramp rate (i.e., defined in degrees per wafer) until the control temperature is reached. For example, the control temperature may be 400xc2x0 C., the ramp may be 5xc2x0 C., and the ramp rate may be 0.5xc2x0 C./wafer. This would result in a ramp from 395xc2x0 C. to 400xc2x0 C. over the first ten wafers following the cleaning operation. Different maximum ramp and ramp rate parameters may change the number of wafers in the set during the ramp period. These parameters are static in the operating recipe. Compromise values are selected during programming of the recipe. As the showerheads age, the effectiveness of this approach decreases, because the duration of the post-clean deposition rate effect increases.
Another destabilizing factor affecting the deposition rate results from subjecting the tool to an idle period. The tool commonly experiences idle times where the temperature of the tool is maintained at a level significantly less than its operating temperature. Other reasons for idle time include periodic testing or calibration and delays caused by other tools (not shown) upstream in the processing line. When the tool is placed back in service following the idle time, the deposition rate is generally lower during the first wafers processed. This effect is illustrated by the curve 8 shown in FIG. 1B.
The idle time destabilizing factor causes a deposition rate effect opposite that of the post-clean effect. In a situation where a clean is performed on a tool with new shower heads, but the tool is left idle for a period of time before being placed in service, these effects can effectively cancel. However, in a tool with older showerheads, the effect may be compounded.
The static post-clean temperature ramp technique described above has limitations due to the variability in the duration of the post-clean destabilizing factor and the possibility of the post-idle destabilizing factor. The temperature ramp may control thickness variations during one set of operating conditions, but as the showerheads age and idle times are interjected, its effectiveness decreases. If the thickness of the deposited wafer is not within tolerances, the wafer is re-worked (e.g., polished if too thick or subjected to another deposition if too thin). This rework is costly because it ties up the tools necessary for the rework to process only a limited number of wafers.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
One aspect of the present invention is seen in a method for reducing deposition thickness variation in a processing tool. The method comprises storing a post-clean performance model of the processing tool; receiving at least one of a showerhead age and a tool idle time associated with the processing tool as an input parameter; determining temperature control parameters based on the input parameter and the post-clean performance model; and modifying an operating recipe of the processing tool based on the temperature control parameters.
Another aspect of the present invention is seen in a processing system including a processing tool and an automatic process controller. The processing tool is adapted to process wafers in accordance with an operating recipe. The automatic process controller is adapted to store a post-clean performance model of the processing tool, receive at least one of a showerhead age and a tool idle time associated with the processing tool as an input parameter, determine temperature control parameters based on the input parameter and the post-clean performance model, and modify the operating recipe of the processing tool based on the temperature control parameters.